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Sunnyvale, CA
Hometown: sunnyvale

Member since:

May 20, 2013

What would you like to get out of this meetup?

Meet people interested in logic design related topics.

How much experience do you have with SystemVerilog? Don't be modest.

5 years.

What are the ideal locations/times for you, for such meetups?

after work, weekends.

Would you or your employer be willing to host an event or provide a projector?

Will have to check.

Will you be attending DVCon this year and able to attend a meetup one day?



I am Logic design engineer, currently working on emulation and FPGA prototyping.

Member of 45 other Meetups

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