Guest lecture at HM: RISC-V @ NVIDIA

RISC-V at NVIDIA: One Architecture, Dozens of Applications, Billions of Processors

RISC-V is an open standard for processor instruction set architectures. Since its inception it has seen tremendous adoption. NVIDIA selected RISC-V ten years ago and today every NVIDIA chip comes with multiple RISC-V processor cores. This talk will give an overview of why NVIDIA has chosen RISC-V, where it can be found in NVIDIA hardware, RISC-V based security hardware and how future RISC-V application processors will be enabled with CUDA. Frans Sijstermans is Vice President at NVIDIA and leads all RISC-V activities along with many other hardware architectures, such as the deep learning accelerator NVDLA.

Please register here: https://riscv-nvidia-hm.eventbrite.com