Braided Parallelism: A Programmer's Perspective


Details
VIP Speaker: Benedict Gaster - Braided Parallelism: A Programmers Perspective. Also featuring a new event format - HAC: HPC and GPU Supercomputing Acceleration Challenge
Come for Table discussions, Member Self-Intro, What's New, Application Showcase, and Advanced Application Development Techniques! Exchange ideas, meet experts, share code... all HPC & GPU, all practical, all cutting-edge.
Agenda:
General Discussions:
6:15-6:30pm What’s new in HPC & GPU Supercomputing
6:30-6:45pm Member self-intros: 30 seconds for each member
Main Program:
6:45-7:45pm Braided Parallelism - A Programmers Perspective (Ben Gaster, Ph.D.)
7:45-7:50pm Break
7:50-8:20pm HAC: HPC and GPU Supercomputing Acceleration Challenge (Greg Gibbons, Ph.D.)
Book Review:
8:20-8:30pm Selected Chapters
Braided Parallelism - A Programmers Perspective
GPU architectures are often described in confusing and overly optimistic terms. The AMD Fusion APU architecture provides improvements in communication latency and bandwidth between devices, so the problem of choosing the right core on which to execute code becomes both more acute and more flexible as communication between tasks becomes easier. But as the CPU and GPU become ever closer how does one program these machines? This talk takes a look at these emerging architectures and touches on the current parallel programming models for CPUs and GPGPUs and follows this with a what future programming models for heterogeneous architectures will look like.
Speaker Bio:
Dr. Benedict R. Gaster is a software architect working on programming models for next-generation heterogeneous processors, particularly examining high-level abstractions for parallel programming on the emerging class of processors that contain both CPUs and accelerators such as GPUs. He has contributed extensively to the OpenCL’s design and has represented AMD at the Khronos Group open standard consortium. He has a Ph.D. in computer science for his work on type systems for extensible records and variants.
Location:
Room 109/110;
Carnegie Mellon Silicon Valley;
NASA Research Park Bldg 23;
Mountain View, CA 94043;
Directions (http://www.cmu.edu/silicon-valley/about-us/directions.html) to Carnegie Mellon Silicon Valley;
Google Map (http://maps.google.com/maps/ms?gl=us&hl=en&ie=UTF8&msa=0&ll=37.410941,-122.063169&spn=0.019191,0.048923&t=h&z=15&msid=215438781255871976989.00049cacf6f0e5596e5cc) showing parking, check point, and building entrance;
NOTE: You will need a government issued ID (e.g. Driver's License) to enter NASA Research Park
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Braided Parallelism: A Programmer's Perspective