Lianne Lairmore on Translating Haskell to Hardware

Despite years of research, most digital integrated circuits are still described in low-level register-transfer languages like Verilog and VHDL. Users must enumerate nearly every gate, wire, and flip-flop, something we would like to avoid in today's era of billion-transistor chips. Moreover, types in these languages tend to be limited to bit vectors, and even basic control constructs such as iteration are barely supported.

Consequently, many have proposed higher-level hardware description languages, allowing the designer to specify behavior of their computation without concern for such low-level implementation details. These efforts have demonstrated the importance of the original language semantics. Imperative languages such as C tend to produce mediocre hardware because their semantics rest on a single, global memory that is difficult to parallelize. Functional languages in the form of embedded DSLs have met with more success.

Rather than have the developer express his or her computation in a hardware-oriented DSL, we propose that they describe their circuit using a standard, modern functional language such as Haskell. This talk presents a language, FHW, that is serves as an intermediate representation for a general Haskell-to-hardware compiler.

The goal of the work presented here is to synthesize hardware from arbitrary Haskell programs through a series of semantics-preserving transformations that ultimately fit a program to FHW--a dialect of GHC's Core intermediate representation that admits a syntax-directed translation to hardware.