June Bay Area RISC-V Meetup
Details
Save the date for the next RISC-V Meetup - June 19! This event will be hosted by SiFive! We will start with a networking session. The following are the topics and speakers planned for the evening:
- Commercial Software Tools - Larry Lapides, Imperas
- Securing RISC-V Processors - Dan Ganousis, Dover Microsystems
- Extending Unleashed with AI Accelerators - Palmer Dabbelt, SiFive
About Larry:
Larry is VP of Sales at Imperas. Prior to joining Imperas, Larry ran sales at Averant and Calypto Design Systems. He was vice president of worldwide sales during the run-up to Verisity's IPO (the top performing IPO of 2001), and afterwards as Verisity solidified its position as the fifth largest EDA company. Before Verisity and SureFire (acquired by Verisity), Larry held positions in sales and marketing for Exemplar Logic and Mentor Graphics. Larry was recently an Entrepreneur-in-Residence at Clark University's Graduate School of Management, where he developed and taught a course on Entrepreneurial Communication and Influence. Larry holds an MBA from Clark University in addition to his MS Applied & Engineering Physics from Cornell University and BA Physics from the University of California Berkeley.
About Dan:
Dan is currently the Director of Sales at Dover Microsystems. He began his 40-year career in the semiconductor industry working on the design, test, and manufacturing of the Z80, 65C02, MicroVAX, and Solbourne microprocessors. He moved into sales and marketing in the EDA industry where he held executive positions at Mentor Graphics, Viewlogic, and VeriBest before assuming the CEO position at startups AccelChip and Arithmatica. Most recently Dan was a business development consultant for embedded processor IP vendors Codasip, Cortus, and Andes. Dan holds a BSEE degree from Rensselaer Polytechnic
Institute.www.dovermicrosystems.com
About Palmer:
Palmer is currently the RISC-V Software Team Lead at SiFive, where he maintains the RISC-V ports of binutils, GCC, glibc, Linux, and QEMU. Palmer got involved in the RISC-V project when he was a graduate student at UC Berkeley, where he worked on a pair of RISC-V chips and contributed to the RISC-V software ecosystem. He began his career at Tilera, where he spent most of his time working on a port of Sun's HotSpot Java virtual machine to a pair of Tilera's ISAs. In addition his MS in Computer Science from UC Berkeley, Palmer holds a BS in Electrical Engineering from the University of Illinois.
June Bay Area RISC-V Meetup