Name: Join us for the first Cambridge RISC-V Meetup!
Start: 2018-11-20T18:00:00Z
End: 2018-11-20T20:30:00Z
Location: westminster college cambridge

Join us for the first RISC-V Meetup in Cambridge hosted by UltraSoC and Imperas!

The evening will start with a networking session, including refreshments. We will have talks from interesting speakers, as well as technology demonstrations.

We are pleased that Graham Markall of Embecosm will be speaking, alongside Simon Davidmann of Imperas and Gajinder Panesar of UltraSoC.

Places are going quickly so please secure your place soon and let us know you are coming. We look forward to seeing you there.

Please visit https://riscv.org/ for more information about RISC-V, and to read how, as a member of the RISC-V Foundation, UltraSoC is deeply involved in developing and defining the debug architecture for RISC-V standards visit https://www.ultrasoc.com/technology-2/risc-v/. Imperas helps RISC-V developers with virtual platforms and tools for early software development, RISC-V compliance testing and test development. Visit www.imperas.com/imperas-risc-v-solutions.

UltraSoC

Imperas

Cambridge RISC-V Meetup Group

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Join us for the first Cambridge RISC-V Meetup!

westminster college cambridge

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Cambridge RISC-V Meetup Group

Join us for the first Cambridge RISC-V Meetup!

Cambridge RISC-V Meetup Group

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