Hyperledger Performance Improvements (Demos, Discussion, and Debate)

Agenda
• Welcome, Introductions, and General Updates (5 min)
• Performance Benefits via Hardware Acceleration (30min) (Sundararajarao Mohan, Xilinx)
• Discussion and Debate (20-30 min)

This virtual meetup will consist of a demo and a discussion led by S. Mohan from Xilinx on ways improve the performance of Hyperledger projects.

----------------------------------------------------------

Performance Benefits via Hardware Acceleration – A Presentation, Demo, and Discussion from Xilinx
The blockchain research group at Xilinx, the leading FPGA vendor, has been studying different methods to improve the performance of Hyperledger Fabric, and other blockchains. Historically, FPGA chips have been used to accelerate PoW mining for Bitcoin and Ethereum in the early days of the cryptocurrencies. They are also used for several alt-coins.

The group’s current focus is on identifying specific areas of HLF that can benefit from hardware acceleration. They will showcase their work identifying these bottlenecks. They will further describe how they have improved the performance for block validation in HLF by an order of magnitude. A short demo of their proof-of-concept work will be followed by a discussion.

About the Speaker
Sundararajarao Mohan is a Distinguished Engineer at Xilinx in San Jose, CA. After graduating from IIT Madras, and the University of Michigan, he has been working on various aspects of FPGA architecture, software, and applications at Xilinx. He leads a small group of researchers distributed across North America and Asia, working on blockchain improvements.