What we're about

This group is for anyone interested in the open RISC-V ISA and related ecosystem..

Check out the RISC-V Foundation site for more information on RISC-V:

https://riscv.org/

RISC-V is a free ISA (Instruction Set Architecture) for a new bread of CPUs. It ranges from small CPU’s like found in Sensores for IoT over to Accerators and is also utilized in Datacenters. RISC-V is growing and will become more popular over the next years! The idea is to meet and talk about the possibilities of RISC-V and how to utilize it.

You should join when:
a) You are interested in CPU architecture
b) Work in IC design and want to hear more about RISC-V trend
c) know basics about electronic and want to know more about RISC-V

Past events (3)

Munich RISC-V 3rd Meetup (second virtual)

Online event

Munich RISC-V second Meetup (first virtual Meetup)

Online event

Munich RISC-V First Meetup at Hochschule Muenchen (MUAS)

Munich University of Applied Sciences

Photos (8)