This is a group for those interested in the formal verification of hardware and software systems.
It has only recently become practical for computer hardware and software to be formally verified, that is, to have machine-checked mathematical proofs that the system correctly meets some specification. While testing can give you a sense that your software or hardware behaves the way you expect it to, formal verification gives you much stronger assurance of correctness. However, formal verification is still difficult and unusual, and so classes on it are rare, and knowledge of the techniques is not widely disseminated.
Our meetup will host talks on the topic, and provide an opportunity for people interested in the area to meet and exchange information, in an effort to share knowledge of formal methods more widely.