Digital Design with FPGAs


Details
Field-Programmable Gate Arrays (FPGAs) are a unique, versatile class of Integrated Circuits (ICs) that can be configured to implement customized digital logic circuits.
In this in-depth talk, we will explore this powerful reconfigurable hardware, starting with an overview and its history, further diving into the internal structure of an FPGA. We will examine how the core components - configurable logic blocks and various memory elements - operate and how these building blocks are configured to create specific digital functions.
This presentation will also cover the FPGA design methodology using hardware description languages (HDLs) with examples, and the various stages of synthesis, mapping, and routing.
We will also look at the practical applications in demanding fields such as medical imaging and diagnostics, and cutting-edge AI/Machine Learning acceleration, showcasing their capability for custom hardware development.
Speaker Bio:
Smitha Kaje is an Embedded Systems Engineer at Spellman High Voltage Electronics Corporation, Hauppauge, NY, specializing in digital design and coding of FPGAs, GUIs, microcontrollers, and DSPs for high-voltage Medical Devices such as CT Scanners & X-ray Generators.
She has two master degrees in electrical and computer engineering from Stony Brook University and BITS Pilani-Dubai and has over 12 years of professional experience.
She is a dedicated contributor to academic research, with three peer-reviewed conference papers published on FPGA-based accelerators. She actively reviews technical papers in journals/conferences and also enjoys judging technical competitions.
Smitha volunteers as the chair of the IEEE Signal Processing Society of Long Island 2025 and is a part of the organizing committee for IEEE Women in Engineering Forum USA East 2025.
Agenda:
We will start our meeting at 7:00 pm. For the next 10 minutes or so, we will introduce ourselves, handle any LICN business and do a little networking. We will then start our presentation. After the presentation, feel free to stick around and chat with others to network or to further discuss our lecture topic.
NOTES
There is no cost to attend this meeting, however, if you are a NYS Professional Engineer and would like to receive Professional Development Hours (PDHs) of continuing education credit, then payment of a $15 fee is required. You will also have to properly fill out an Evaluation Form to prove that you attended this lecture.
Click here to open the form. Simply fill it out and click on the “Submit” button. PDHs will be granted based upon actual time of lecture including Q&A. You must stay to the end to receive credit.
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While we prefer that your payment and evaluation form are received by the day of the lecture, they must be received by the first Monday after the lecture.
If paying by Zelle is a problem for you, then please contact Ed Gellender at edgellender@gmail.com for an alternate payment method.

Digital Design with FPGAs