LLVM / Clang Social Meetup - Toronto Area

Come join use for our next social and talk!

Agenda:
6:00 - 6:30 pm Social interactions
6:30 – 7:00 pm Presentation ("Optimizing SYCL programs with MLIR for AI accelerators" - presented by Amy Wang)
7:00 - 7:30 pm Q&A
7:30 pm - pizza on site

Talk abstract:
There is a growing need for higher level abstractions for device kernels in heterogeneous environments, and the multi-level nature of the MLIR infrastructure perfectly addresses this requirement. As SYCL begins to gain industry adoption for heterogeneous applications and MLIR continues to mature, this talk focuses on the effort in targeting SYCL's device code generation for Huawei's AI accelerator. It also covers numerous interesting aspects ranging from runtime support, to SYCLops, an LLVM-to-MLIR converter, to optimizations performed in MLIR.

Speaker bio:
Amy Wang is a senior compiler researcher working for Huawei's Heterogeneous Compilers Lab in Markham. Her past research areas include auto-SIMDization, transactional memory and the Java language runtime. Recently, she spends most of her effort in SYCL device code generation targeting Huawei's AI accelerator, a.k.a. the DaVinci chip, using MLIR. She had previously worked in IBM's XL compiler team prior to joining Huawei.