AccelSeeker: An LLVM-based tool-chain for DSE of hardware accelerators

Abstract

Designing heterogeneous systems is a difficult task. Beside ensuring functional correctness of an implementation, hardware developers are confronted with multiple and often conflicting constraints, such as performance and area cost targets, that require lengthy explorations. This issue is compounded when considering the acceleration of complex applications, of which some parts are implemented in software, and others are accelerated in hardware. Hardware/Software partitioning must be settled early in the development cycle, and is far from trivial, since at this stage detailed performance measurements are not available, while wrong choices can lead to vastly sub-optimal solutions or to wasted implementation efforts. To address this challenge, a framework is presented to automatically evaluate their potential performance and resource requirements, as wells as to perform selection of a subset of them under specific resource constraints. This strategy is based on Intermediate Representation (IR) analysis passes, which have been implemented within the LLVM compiler toolchain, and does not require any time-consuming synthesis.

Bio

Georgios Zacharopoulos is a Senior Researcher in Huawei Zurich Research Center, where he performs research in heterogeneous computing. Previously he was a Postdoctoral Researcher at the Harvard Architecture, Circuits, and Compilers Group in Harvard University, Cambridge MA. He was born in Athens, where he received his BSc degree from the department of Digital Systems at the University of Piraeus, Greece in 2012. He received his MSc degree in Computer Science from Uppsala University, Uppsala, Sweden in 2015. He received his PhD in the faculty of Informatics at USI Lugano, Switzerland in 2020. His Master Thesis was included in a paper he co-authored, which received the Best Paper Award in the 25th International Conference on Compiler Construction (CC).

He investigates compiler analysis and machine learning methodologies for the design of heterogeneous and cloud computing systems.