Sanjay Rai: Using C/C++ Algorithms in an FPGA Accelerated Environment

This month our featured speaker is Sanjay Rai from Xilinx to talk about using High Level Synthesis (HLS) with your FPGA designs.

Sanjay Rai: Using C/C++ algorithms in an FPGA accelerated environment

With CPU compute efficiency not keeping pace with moore’s law there has been an emergence of demand for heterogeneous computing. FPGA based accelerators have being gaining momentum in this space for certain types of workloads but remain esoteric due to the complexity of the tools involved. This presentation makes the case for using traditional programming model of using C/C++ algorithms coupled with a generic FPGA framework to make the PCIe attached FPGA accelerator more accessible to the general scientific computing community.

Sanjay Rai is local to the Pacific Northwest and has been an Application Engineer at Xilinx for over a decade. Prior to that he worked at Honeywell Aerospace and daVinci Systems with FPGA experience going back to the early 90's. He's extremely experienced and knowledgeable with Xilinx PCIe IP, Partial Reconfiguration, and Xilinx's HLS tools.

We also welcome anyone that wants to give a 5 minute lightning talk on any projects to contact us so we can get you on the schedule. We'll also have Jan Gray present the monthly FPGA gazette with a recap of some highlights from FCCM 2018.

This time we'll be at the Micron offices at the Smith Tower in Pioneer Square. Just tell security that you're here for the meetup at Micron and they'll direct you to the 13th floor. We'll be in the Jetson room to the right as you exit the elevators. For those interested in getting a beer afterward, we'll be heading to Collin's pub following the meeting. Looking forward to seeing you all there!