Portable SystemVerilog Examples for ASIC and FPGA @ Hacker Dojo

We continue to work on a set of digital design examples trying to solve the following world challenges:

1. Remove the EDA and FPGA vendor locks for the educators. Our examples support 30 boards with FPGAs from Xilinx, Altera, Gowin and Lattice and also aim to be compatible with open-source ASIC design tools.

2. Compensate the gap between academia and industry in solving microarchitectural problems necessary for a career in ASIC design, building CPU, GPU and networking chips.

3. Reduce the barrier of entry for the novice or a person from a related field aiming to extend their expertise to become better in system design or software acceleration.

We also need to create a proposal for a hackathon in Hacker Dojo using the devpost website.

You can read more details here - https://habr.com/en/articles/788710/

See you on Sunday!