Circuit Compilation and Error Mitigation for Near-Term Quantum Computing

Topic : Circuit Compilation and Error Mitigation for Near-Term Quantum Computing
Summary: Today's quantum computers are qualified as noisy intermediate-scale quantum (NISQ) hardware with several physical limitations in realizing quantum hardware and has noisy operations. There are many quantum algorithms aiming at achieving quantum advantages. However, how to realize them on real quantum hardware is still a challenge.
In our work, we focus on hardware-software co-design methods to investigate circuit compilation and error mitigation
techniques for near-term quantum computing. We first target the quantum circuit transpilation process to transform
high-level circuits to low-level circuits with high fidelity, which is referred as “qubit mapping problem”. Another
challenge arises from the current limitation of the quantum hardware as only small circuits can be executed on real
hardware to get reliable circuits. This leads to hardware under-utilization issue. We address this problem by proposing a
hardware-aware multi-programming mechanism. Moreover, we analyze dynamical decoupling and pulse-level noise
mitigation methods to reduce decoherence error and further improve the application fidelity.
In this talk, Siyuan starts by giving an overview on the near-term quantum computing, introducing different quantum
technologies. Then, she will focus on the current challenges and the progress of developing circuit compilation and error
mitigation methods for advancing quantum computing.

Bio: Siyuan Niu received the B.S. degree in electronic and information engineering from Xidian University, China in 2018,
M.S. degree in electronic engineering from Polytech Nice Sophia, France, in 2019. She is currently a third-year Ph.D
candidate in quantum computing from the University of Montpellier. Her research interests focus on quantum computer
aided-design, quantum compiler, and quantum error mitigation.

Facilitator: Pawel Gora, CEO of Quantum AI Foundation.
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