Modular Quantum Computing and On-chip Quantum Communication Networks


Details
Date: May 31 2025 Noon - 14:00 EDT
Title: Modular Quantum Computing and On-chip Quantum Communication Networks
Summary:
Modular quantum computers are envisioned as a promising approach to scaling up quantum processors beyond the NISQ era. This technique is based on interconnecting smaller-sized QPUs within a system to alleviate technical issues that arise from packing a large number of qubits closely in a single processor, such as crosstalk, accelerated decoherence of qubits, and increasing complexity of the control system. While promising, modular architectures present challenges related to algorithm compilation, managing and optimizing inter-core state transfers, and integrating high-fidelity, low-latency physical interconnects at the hardware level. In this talk, we particularly focus on the compilation and networking layers, proposing a framework to characterize the spatio-temporal qubit traffic generated by inter-core quantum state transfers according to a set of performance metrics of resource usage uniformity in space and time, and locality, aiming to assess the computation and communication workloads in large-scale modular architectures supporting ~1000 qubits. Additionally, we propose an analytical methodology based on Design Space Exploration (DSE) to evaluate and extrapolate the efficiency and scalability of contemporary quantum communication technologies for modular settings, aiming to develop a simulator for large scale networks for modular quantum computers.
Speaker: Sahar Ben Rached, PhD candidate of Universitat Politècnica de Catalunya
Moderator: Dr. Sebastian Zajac, member of QPoland

Modular Quantum Computing and On-chip Quantum Communication Networks