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RISC-V is a free and open Instruction Set Architecture enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for future computing design and innovation.

In the true spirit of Chip Chat, which brings hardware, software, system and application designers together, our November event has talk on "Software State of the Union" for RISC-V ecosystem by an excellent speaker Nathaniel Graff, from SiFive and " Hardware Frameworks for building custom silicon faster" by Rajesh V, also from SiFive.

Topic : "Software State of the Union" for the RISC-V ecosystem

Speaker : Nathaniel Graff

Bio : Nathaniel Graff is a Software Engineer at SiFive Inc. developing embedded runtimes and real-time operating systems for RISC-V. He has a MS in Electrical Engineering with an emphasis in embedded security and cryptography from California Polytechnic State University San Luis Obispo.

Topic : " Hardware Framework to Enable Faster Idea-to-Silicon Realization"

Speaker : Rajesh V

Bio : Rajesh Varadharajan is currently the Director of Applications engineering at SiFive responsible for configuring and delivering the custom RISCV cores to the customers. Around 14+ years of experience In ASIC and FPGA design, Rajesh started his career in Rambus as ASIC Engineer working on Ethernet, PCIExpress IPs. After a start stint in SanDisk as Application Engineer where he was building INAND validation platforms, he moved back to Rambus Cryptography Division where he was responsible for designing the Consumable crypto firewall chip. Rajesh received his bachelors from University of Madras , India and finished his masters in Vellore Institute of Technology, India

AGENDA :
6:30pm - 7:00pm - Registration and Networking
7:00pm - 8:00pm - Tech Talks
8:00pm - 8:30pm - Networking

NOTES :

  1. Suggested donation is 10/- to cover the expenses.
  1. Confidential Information will not be discussed. Audience is requested
    to refrain from asking questions related to confidential information.

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GENERAL:

  • Please register as soon as possible before we run out of space
  • Please mark your calendars and do not miss this Chip Chat event

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ACKNOWLEDGEMENTS:

Thanks to Nathaniel Graff and Rajesh for readily accepting our invitation to give the talk.

Special thanks to IEEE SVC Young Professionals for co-hosting this event.

Chip Chat Committee : Rambabu Pyapali, Hari Sathianathan, Sriram Radhakrishna, Wenbo Yin, Sukriti Kapoor and Nihita Sadhana

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