Improve by Doing: Portable SystemVerilog Examples for ASIC and FPGA

To bootstrap a team making portable SystemVerilog examples for 50 FPGA boards and open ASIC tools. The focus is on hardware for sound processing and graphics, as well as on microarchitectural problems at the level of a typical job interview in an electronic company.

The meetups can be helpful for those who

• Want to start a career in digital design and verification of silicon chips or reconfigurable hardware;
• Have already started but want to explore other FPGA toolchains or open-source ASIC tools;
• For the software engineers interested in FPGA-based hardware accelerations or designing a simple custom CPU.

MEET THE SPEAKERS

1. Yuri Panchul, a design engineer in the GPU team at Samsung Advanced Computing Lab. Previously worked on a network chip in Juniper and CPUs in MIPS. Founder of a startup C Level Design, funded by Intel and acquired by Synopsys. [https://www.linkedin.com/in/yuripanchul/ ](https://www.linkedin.com/in/yuripanchul/ )

2. Aliaksei Chapyzhenka, a software engineer in SiFive, a RISC-V company, was previously a hardware design engineer at Intel. Author of WaveDrom, a popular timing diagram editor. https://www.linkedin.com/in/drom/