Verilog Meetup
Details
Portable SystemVerilog examples for ASIC and FPGA
Sunday, February 4, 2024, from 2pm till 4pm.
Sunday, February 11, 2024, from 2pm till 4pm.
We continue to work on a set of digital design examples for the
students of electronic chip engineering.
We are trying to solve the following industry and academia challenges:
1. Remove the EDA and FPGA vendor locks for the educators. Our
examples support 30 boards with FPGAs from Xilinx, Altera, Gowin and
Lattice and also aim to be compatible with open-source ASIC design
tools.
2. Compensate the gap between academia and industry in solving
microarchitectural problems necessary for a career in ASIC design,
building CPU, GPU and networking chips.
3. Reduce the barrier of entry for the novice or a person from a
related field aiming to extend their expertise to become better in
system design or software acceleration.
We also need to create a proposal for a hackathon in Hacker Dojo using
the devpost website.
See you on Sunday!
Verilog Meetup